This is Nvidia so you'd think I'd have prepared harder for this.
Start by contrasting the CPU's latency-optimized design with the GPU's throughput-optimized architecture, then walk through the GPU pipeline from thread scheduling to memory hierarchy. Use concrete examples like matrix multiplication to illustrate how massive parallelism and SIMT execution enable high throughput.
Pro tip: Emphasize that GPUs are not just 'more cores' but a fundamentally different design philosophy: CPUs minimize latency for serial tasks, GPUs maximize throughput for parallel tasks. Mention that NVIDIA's success comes from co-designing hardware and software (CUDA) to make this paradigm accessible.
Explain that CPUs are latency-optimized with large caches, out-of-order execution, and few powerful cores, while GPUs are throughput-optimized with many simple cores and massive parallelism.
Cover Streaming Multiprocessors (SMs), each containing many CUDA cores, warp schedulers, register files, and shared memory/L1 cache. Mention the global memory (DRAM) and how data flows through the hierarchy.
Detail how threads are grouped into warps (32 threads) that execute in lockstep, and how the warp scheduler hides latency by switching between warps. Contrast with CPU's out-of-order execution.
Discuss the importance of coalesced memory access, the role of shared memory as a programmer-managed cache, and how high bandwidth (e.g., HBM) feeds the many cores.
Conclude that GPUs excel at data-parallel tasks (graphics, deep learning) but are poor for serial or branch-heavy code. Mention that modern systems often use both CPU and GPU together (heterogeneous computing).
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